A domestic DRAM technology breakthrough was the central storyline this week. On October 9, Cao Kanyu, President of ChangXin Memory Technologies (CXMT), announced at the 4th Integrated Chips and Chiplets Conference that a new-generation DDR5 RDIMM combining 4F² architecture and hybrid bonding will debut by year-end, squarely targeting the server memory market. The 4F² architecture is widely recognized as the next-generation direction for DRAM, capable of raising memory density by roughly 50%, and it marks a shift by Chinas domestic DRAM industry from process miniaturization toward architectural innovation. On the same day, Samsung Electronics released preliminary Q3 results: operating profit reached KRW 107.4tn (approximately USD 80.1bn), surging 782.5% year-over-year and exceeding KRW 100tn in a single quarter for the first time, as the AI memory supercycle continued to play out. TSMCs Q3 revenue grew more than 50% year-over-year; Goldman Sachs raised its target price to TWD 3,300 and expects advanced-node prices to rise another 5%–10% in 2027. On the supply chain side, GlobalFoundries signed a USD 2bn agreement with TSMC to establish a CoWoS silicon interposer base in the United States; Hua Hongs Wuxi Phase III joint-venture structure formally landed; ASML implemented a uniform 10% price increase on lithography tool parts; and Musks Terafab chip plan continued to advance.
CXMTs 4F² Architecture Product to Debut by Year-End with Hybrid Bonding, Targeting the Server DDR5 Memory Market
On October 9, at the 4th Integrated Chips and Chiplets Conference, Dr. Cao Kanyu, President of CXMT, delivered a presentation covering the companys technology exploration in DRAM devices, the 4F² architecture and hybrid bonding. Key points:
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Technology breakthrough: CXMTs 4F² DRAM architecture R&D recently achieved critical progress. The 4F² architecture is widely recognized as the next-generation direction for DRAM, with each memory cell occupying only 4 times the square of the minimum feature size. -
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Product roadmap: A new-generation DDR5 RDIMM product combining 4F² architecture and hybrid bonding is expected to launch by year-end, formally entering the server memory market. -
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Technology comparison: The industry mainstream is currently the 6F² architecture, where each memory cell occupies 6 times the square of the minimum feature size. The 4F² architecture can increase memory density by roughly 50% and represents the next high ground in DRAM technology. -
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Hybrid bonding: Integration of hybrid bonding technology enables memory stacking with higher bandwidth and lower power, providing stronger performance support for AI server memory. -
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Existing foundation: CXMTs G5 platform entered volume production on September 20, with an 11.95nm process comparable to the global leading edge; DDR5 chips reach 8,000Mbps with 16Gb/24Gb capacities; H1 2026 revenue reached RMB 150.3bn, up 874% year-over-year, with net profit of RMB 77.6bn, turning profitable.
The development sits in the advanced-architecture R&D stage of DRAM memory chips, with the technology breakthrough driving upgrades across the entire supply chain:
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Upstream: DRAM manufacturing equipment (advanced etching, thin-film deposition), hybrid-bonding equipment, silicon wafers, photoresists and other advanced materials. -
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Midstream: CXMTs 4F²-architecture DRAM wafer manufacturing and DDR5 RDIMM server memory, competing with Samsung, SK hynix and Micron in the high-end server memory market. -
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Downstream: AI servers, data centers, enterprise servers and high-performance computing. Server memory is the highest-value-added segment within memory chips.
Impact cascades through the supply chain, affecting each segment differently:
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Upstream equipment and materials: The 4F² architecture imposes higher precision requirements on advanced etching and thin-film deposition equipment, while demand for hybrid-bonding equipment rises. Domestic advanced equipment and materials suppliers gain more qualification and adoption opportunities. -
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Midstream memory manufacturing: CXMTs 4F² breakthrough marks a shift by Chinas domestic DRAM industry from process miniaturization toward architectural innovation, moving the technology roadmap from catch-up toward parity and potentially breaking overseas suppliers monopoly on next-generation DRAM architectures. -
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Downstream AI compute: With 4F² architecture plus hybrid bonding, DDR5 RDIMMs are entering the server memory market, extending domestic high-end memory substitution from consumer electronics into data centers and strengthening the resilience of AI server memory supply chains. -
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Domestic industry perspective: Amid the AI memory supercycle, CXMT is being driven by both technology breakthroughs and capacity expansion, with global memory market share expected to keep rising. Domestic memory equipment and materials suppliers stand to benefit fully, and domestic substitution in advanced packaging equipment is accelerating. -
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Customs perspective: Import substitution in high-end server memory is accelerating. HS classification, origin determination, eligibility for duty and tax exemptions and port inspection efficiency for DDR5 RDIMMs are becoming key variables in the memory supply chain.
Explosive demand for AI model training and inference and accelerating AI data center construction are driving a surge in demand for server DDR5 memory and high-bandwidth HBM, with high-end memory rising in both volume and price.
CXMTs 4F² architecture R&D achieved critical progress; a new-generation DDR5 RDIMM with hybrid bonding will debut by year-end, targeting the server memory market. The G5 platform is already in volume production with an 11.95nm process comparable to the global leading edge.
The 4F² architecture demands higher precision from advanced etching and thin-film deposition equipment, and hybrid-bonding equipment demand is rising. Domestic advanced equipment and materials gain more qualification and adoption opportunities, with advanced packaging equipment substitution accelerating.
CXMT is moving from process miniaturization (G5 at 11.95nm) toward architectural innovation (4F²), shifting its technology roadmap from catch-up toward parity. Domestic high-end memory substitution is extending from consumer electronics into data centers, strengthening AI server memory supply-chain resilience. Amid the AI memory supercycle, CXMT is being driven by both technology breakthroughs and capacity expansion, with global memory market share expected to keep rising.
Update 1 | TSMC Q3 Revenue Growth Tops 50%; Goldman Sachs Raises Target Price to TWD 3,300 and Expects Further Advanced-Node Price Increases in 2027
On October 8, TSMC released its Q3 revenue figures, showing year-over-year growth of more than 50% as positive momentum continued across the AI supply chain. Key points:
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Revenue growth: Q3 revenue rose approximately 51% year-over-year, with broad-based demand growth across AI GPUs, networking chips and server CPUs keeping advanced-node capacity fully utilized. -
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Goldman Sachs upgrade: On October 6, Goldman Sachs raised its 12-month target price for TSMC from TWD 3,100 to TWD 3,300, implying roughly 28% upside, and lifted its capex forecast. -
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Pricing outlook: Goldman Sachs expects TSMCs advanced-node prices to rise 5%–10% in 2027 and mature-node prices to rise 0%–3%, with N2 and N3 capacity continuing to expand but supply remaining tight. -
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Capacity status: The 2nm Fab 20 in Baoshan, Hsinchu and Fab 22 in Kaohsiung will each reach 50,000 wafers per month by the end of October, for a combined total of roughly 100,000 wafers; 3nm capacity in the Southern Taiwan Science Park is approximately 180,000 wafers per month. -
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Business outlook: Goldman Sachs believes TSMCs growth momentum will extend through 2027, driven primarily by AI demand for GPUs, networking chips and server CPUs.
TSMC sits at the global leading edge of advanced-node foundry services, and its pricing power influences the entire supply chain:
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Upstream: Advanced-node equipment and materials including EUV lithography tools, high-end photoresists and photomasks; tight capacity is driving upstream demand. -
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Midstream: TSMCs 2nm/3nm advanced-node foundry services, with its global monopoly position in advanced nodes continuing to strengthen. -
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Downstream: AI-chip and high-end processor designers including Nvidia, AMD, Apple and Qualcomm, facing higher manufacturing costs.
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TSMCs successive price increases reflect persistent tightness in advanced-node capacity, with strong AI-chip demand the key driver. Extended order visibility points to a longer industry upcycle. -
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Manufacturing costs for chip-design companies will rise, increasing procurement costs for major customers such as Apple and Nvidia, with part of the increase potentially passed through to end-product pricing. -
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Domestic foundries retain price competitiveness in mature nodes, and TSMCs price increases could help them strengthen pricing power and market share. -
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Customs perspective: Higher foundry pricing drives up chip import costs, increasing the impact of HS classification and customs valuation on landed costs.
Update 2 | Samsungs Q3 Operating Profit Tops KRW 100tn for the First Time, Earning USD 80.1bn in a Single Quarter as the AI Memory Supercycle Continues
On October 8, Samsung Electronics released preliminary guidance for Q3 2026, delivering the strongest quarterly results in its history. Key data:
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Operating profit: KRW 107.4tn (approximately USD 80.17bn / RMB 532.5bn), surging 782.5% year-over-year and exceeding KRW 100tn in a single quarter for the first time. -
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Revenue: Approximately KRW 195tn (approximately RMB 976.8bn), up 126.6% year-over-year and about 13.7% quarter-over-quarter. -
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Sequential profit growth: Operating profit rose about 20% quarter-over-quarter, marking a record high for the fourth consecutive quarter and beating analyst expectations. -
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Core drivers: Continued AI infrastructure buildout is driving DRAM and NAND flash demand, memory chip prices keep rising, and HBM is rising in both volume and price. -
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Full results: This is preliminary guidance only. Full results and detailed profitability for the chip business will be disclosed on October 29.
Samsung sits at the global leading edge of memory-chip manufacturing, with AI memory demand transmitting through the supply chain:
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Upstream: Memory manufacturing equipment and materials including EUV lithography tools, etching equipment, high-end photoresists and silicon wafers; suppliers such as ASML are gaining bargaining power. -
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Midstream: Samsungs DRAM/NAND/HBM memory manufacturing, forming a global three-player oligopoly with SK hynix and Micron. -
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Downstream: AI data centers, servers, smartphones and PCs, with AI compute buildout the core engine of memory demand growth.
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Surging profits at the memory trio are driving capex expansion, sustaining demand growth for EUV lithography tools and advanced etching equipment; ASML has already implemented a uniform 10% price increase on lithography tool parts, strengthening equipment and materials suppliers bargaining power. -
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The AI memory supercycle continues, the memory trios oligopoly is strengthening, and HBM has become the core profit-growth driver; the memory price upcycle is expected to extend through 2027. -
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Rising memory costs are pushing up overall AI server costs and increasing capex pressure on cloud providers; however, rigid AI compute demand means memory shortages are in fact accelerating domestic memory substitution. -
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Domestic industry perspective: CXMT and YMTC stand to benefit fully from the memory supercycle, with G5 volume production and the 4F² architecture breakthrough accelerating substitution in domestic high-end memory; domestic memory equipment and materials suppliers gain more qualification and adoption opportunities.
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1 GlobalFoundries Signs USD 2bn Agreement with TSMC to Build the First CoWoS Silicon Interposer Base in the United States
Event: On October 8, GlobalFoundries announced a multi-year manufacturing agreement with TSMC valued at USD 2bn (approximately RMB 13.4bn) to supply silicon interposers for TSMCs CoWoS advanced-packaging ecosystem at its Malta, New York facility. The initial term is five years and volume production is scheduled to begin in 2028, enabling TSMC customers to label products as "fully manufactured and packaged in the United States."
Position: Advanced packaging materials segment; silicon interposers are the core component of CoWoS packaging and a key material for AI-chip advanced packaging.
Impact: CoWoS advanced-packaging capacity is extending into the United States, diversifying the silicon interposer supply chain and reducing dependence on a single region. The U.S. domestic advanced-packaging ecosystem is gradually improving, raising the value of the "Made in USA" label for AI chips. GlobalFoundries gains stable orders, lifting mature-node capacity utilization.
Sources: GlobalFoundries announcement; Tencent News; EE Times China; Icsmart; Sina Finance -
2 Hua Hongs Wuxi Phase III Joint-Venture Structure Formally Lands, with Registered Capital Jumping to USD 4.17bn (Approx. RMB 27.9bn)
Event: On October 8, Tianyancha data showed that Wuxi Hua Hong Grace Phase III Semiconductor Co., Ltd. recently completed a business registration change, adding several heavyweight shareholders and sharply raising registered capital to USD 4.17bn (approximately RMB 27.9bn), marking the formal landing of the joint-venture structure for the Hua Hong Grace Wuxi Phase III project. The project carries total investment of USD 6.95bn and is planned as a 12-inch specialty-process foundry line with monthly capacity of 55,000 wafers, focused on power devices, analog chips and embedded memory.
Position: 12-inch specialty-process wafer manufacturing, covering power devices, analog chips and embedded memory.
Impact: Funding and equity structure have formally landed, moving capacity construction into an accelerated phase. Continued expansion of 12-inch specialty-process capacity will accelerate domestic substitution in power devices and analog chips, further improve Wuxis semiconductor cluster and strengthen the global competitiveness of specialty-process foundry services.
Sources: Tianyancha; Sina Finance; Hua Hong Grace announcement; Securities Times -
3 ASML Implements Uniform 10% Price Increase on Lithography Tool Parts; Korean Memory Duo Accepts in Full
Event: In early October, industry sources reported that ASML has implemented a uniform 10% price increase on lithography tool parts, covering key components for both EUV and DUV lithography systems. Amid the 2026 memory-chip supercycle, Samsung and SK hynix have seen profits surge and have accepted ASMLs price increase in full. Samsungs Q3 operating profit reached KRW 107.4tn (approximately USD 80bn), up nearly 800% year-over-year and a record for the fourth consecutive quarter, with sharply improved customer profitability providing room for equipment suppliers to raise prices.
Position: Upstream semiconductor equipment segment; lithography tools are the most critical and most expensive equipment in wafer manufacturing, and ASML holds a global monopoly in EUV lithography.
Impact: Higher lithography part prices are pushing up wafer manufacturing costs, further strengthening equipment suppliers bargaining power in the supply chain. Surging profits at the memory trio are driving capex expansion and extending ASMLs order visibility. The urgency of domestic lithography R&D and parts substitution is increasing, accelerating equipment self-sufficiency.
Sources: JRJ.com; industry sources; ASML-related reports -
4 Musks Terafab Chip Plan Continues to Advance; TSMC May Only Lease Part of the Site, Intel Remains Involved
Event: On October 4, Musk confirmed he is discussing potential cooperation with TSMC on joining the Terafab chip project, which is being led by Tesla and SpaceX in Grimes County, Texas. On October 7, Musk clarified that Terafab will still be built and operated by his companies, and that any TSMC cooperation may be limited to leasing part of the site. Intel CEO Lip-Bu Tan said Intel will continue to participate in the Terafab plan, and Intels 14A process is currently the only named technology partner. The project aims to reduce reliance on external chip suppliers and build a complete supply chain from design to manufacturing.
Position: Integrated AI chip design and manufacturing, involving advanced-node fab construction and operation.
Impact: Musks cross-industry entry into chip manufacturing introduces a new variable into the global advanced-node capacity landscape. TSMCs "asset-light" participation exports technology and management without bearing heavy-asset risk. Intels continued involvement could help lift advanced-node capacity utilization. Supply chain diversification in AI chip manufacturing is accelerating.
Sources: DIGITIMES; Bloomberg; The Financial Economy; CNMO Tech; Musks public statements -
5 A-Share Memory Chip Sector Falls Broadly on October 9; CXMT, Hua Hong Grace and NAURA Drop More Than 3%
Event: On October 9, A-share memory chip stocks fell broadly. Kangqiang Electronics hit the daily limit down, Kexiang shares dropped more than 9%, and Jingsheng shares, Shengyi Technology and Shennan Circuits fell more than 8%. Hua Hong Grace, GigaDevice, YMTC-related concept stocks and NAURA dropped more than 3%. Market analysis attributes the decline to a large prior rally in the memory sector combined with macroeconomic factors including U.S. Treasury yields climbing to a 24-year high and persistently high energy costs, triggering short-term profit-taking. However, the fundamentals of the AI memory supercycle remain unchanged.
Position: All segments of the semiconductor memory supply chain, covering memory chip design, manufacturing, packaging and testing, materials and equipment.
Impact: Short-term correction in the memory sector does not change the fundamentals of the AI memory supercycle; Samsungs 782% jump in Q3 profit confirms the sectors robust momentum. Valuations are becoming more reasonable after the correction, highlighting the long-term investment value of domestic memory leaders such as CXMT and YMTC. Investors should watch key indicators including memory price trends, capex at the three major suppliers and domestic substitution progress.
Sources: Gelonghui; Sina Finance; Hexun; East Money
Chart 1 · Technology-Node and Architecture Comparison of Global DRAM Manufacturers (2026)
Chart 2 · Q3 2026 Performance Overview of the Global Memory Trio
Note: All figures are subject to official disclosures by the respective sources. In the event of any discrepancy involving qualifications or compliance information, announcements by the competent authorities shall prevail.





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