01

Company Trend（July.14）

UMC Begins 12-Inch Silicon Photonics Chip Production in Singapore, Targeting High-Speed Interconnect Demand from AI Data Centers

On July 14, United Microelectronics Corporation (UMC) announced that its 12-inch silicon photonics production line in Singapore has begun volume production of advanced photonic chips, addressing growing demand for high-speed interconnects in AI data centers. UMC Senior Vice President Steven H. K. Hong said silicon photonics and CPO technologies will become important growth drivers for the company over the next several years. Shifting photonic chip production from traditional 8-inch wafers to 12-inch wafers can effectively reduce optical loss while improving power efficiency and transmission performance. Singapore-based photonic chip company Silith Technology has become the first core strategic customer of the production line. Its customers include optical module maker Zhongji Innolight and Coherent, both of which are major suppliers to Nvidia and Google. UMC is also jointly building a photonic chip production platform with Belgium-based microelectronics research center imec, with plans to open the platform to more customers starting in 2027. On the packaging side, UMC plans to launch customized advanced packaging services in 2027, connecting photonic chips to interposers to shorten electrical transmission paths. In its long-term roadmap, UMC plans to launch an open silicon photonics development platform in 2028 while also carrying out R&D on thin-film lithium niobate chiplet technology. China’s Taiwan region and Singapore will jointly serve as UMC’s main R&D and manufacturing bases for photonic chips and advanced packaging. The company has already assembled a specialized technical team of around 100 people.

Commentary: The volume production of UMC’s 12-inch silicon photonics line in Singapore marks the shift of silicon photonics processes from small-scale laboratory trials to standardized foundry manufacturing. As AI compute clusters continue to scale up, bandwidth demand inside data centers is growing rapidly. Traditional pluggable optical modules are gradually approaching physical limits in terms of power consumption and integration density, making silicon photonics and CPO widely recognized mainstream solutions for the industry. UMC’s decision to build its silicon photonics production line in Singapore is based on two considerations. On one hand, the company can leverage Singapore’s local photonics research resources and mature talent base. On the other hand, a diversified regional footprint can reduce operating risks caused by geopolitical policies in any single region. At the industry level, TSMC’s COUPE silicon photonics platform and UMC’s Singapore foundry line represent two parallel foundry routes, indicating that competition in the silicon photonics foundry market is gradually heating up. For China’s domestic supply chain, Zhongji Innolight’s indirect access to UMC’s photonic chip capacity through upstream supplier Silith will help stabilize the supply of photonic chips for high-end optical modules. However, overall, high-end silicon photonics chips and heterogeneous integration packaging remain weak links in the domestic supply chain. Continued R&D investment is needed to prevent next-generation optical interconnect technologies from creating a new form of external dependence.

02

Policy Trend（July.16）

EU Approves EUR 659mn in German Aid for Four Semiconductor Facilities, Covering SiC Epitaxy, Metrology Equipment, and Power Devices

On July 14, the European Commission announced its approval of EUR 659mn in German state-aid package to support the construction of four new semiconductor facilities in Germany, covering areas including silicon carbide epitaxial wafers, optical overlay and thin-film metrology equipment. The subsidies will be provided in the form of direct grants, jointly funded by Germany’s federal government and state governments. The funding allocation is as follows: EUR 353mn will be granted to Element 3-5 GmbH to build a silicon carbide epitaxial wafer plant in Baesweiler, North Rhine-Westphalia; EUR 214mn will be granted to Vishay Siliconix Itzehoe GmbH to build a facility in Itzehoe, Schleswig-Holstein, for the production of next-generation power MOSFETs used in high-voltage power electronics; EUR 74.4mn will be granted to KLA-Tencor MIE GmbH to produce high-end optical metrology equipment for semiconductor process control in Weilburg, Hesse; and EUR 17.9mn will be granted to KETEK GmbH to build two production lines in Munich for silicon drift detector chips and graphene radiation entrance-window components.

Commentary:The EU’s approval of Germany’s EUR 659mn subsidy package for four semiconductor facilities represents a targeted move under Europe’s chip sovereignty strategy in specific high-value segments. Silicon carbide epitaxy, power MOSFETs, optical metrology equipment, and dedicated detector chips — none of these four projects involve the most advanced logic processes. Instead, they are precisely positioned in areas where Europe has traditional strengths and clear market demand, such as new energy vehicles, industrial power supplies, and semiconductor equipment. This “build on strengths while addressing gaps” strategy stands in sharp contrast to approaches that pursue advanced nodes with tens of billions of euros in investment.

From the perspective of the aid mechanism, the EU’s approval of subsidies from a single member state shows that subsidy limits have been somewhat relaxed under the framework of the Important Projects of Common European Interest (IPCEI) framework. The fact that Vishay, a global power semiconductor leader, and KLA, a leading metrology equipment company, have both received subsidies indicates that Europe is using fiscal tools to attract leading companies to keep or relocate capacity within the region. For China’s domestic industry, Europe’s accelerated localization push in areas such as silicon carbide, power devices, and metrology equipment will create direct competition with China’s domestic substitution efforts in these segments. Relevant Chinese companies need to accelerate technology iteration and cost optimization to consolidate their market share.

03

Company Trend（July.16）

Tower to Invest USD 3bn to Expand Silicon Photonics Chip Capacity in Japan, Backed by USD 1bn Japanese Government Grant

Tower Semiconductor announced plans to invest approximately USD 3bn, equivalent to around RMB 20bn, and has received a USD 1bn grant from the Japanese government to expand its semiconductor manufacturing capacity in Japan, with a focus on demand from AI systems and data center connectivity technologies. The Israeli chipmaker has launched a dual-track expansion plan that will significantly increase capacity for 300mm silicon photonics (SiPho) chips, silicon germanium (SiGe) chips, and advanced optical packaging. The expansion will be carried out through Tower’s operations in Japan, including facilities acquired through its majority stake in TPSCo. Tower expects the first phase to become fully operational in the fourth quarter of 2027. Under its updated business model, the company expects revenue to reach USD 3.6bn and net profit to reach USD 1.2bn in 2028. The second phase will involve the construction of a new 300mm manufacturing facility next to Fab 7, which is expected to increase Tower’s silicon photonics and silicon germanium capacity severalfold. The new facility is expected to begin making a significant economic contribution from 2029. Tower said the dual-track approach is intended to avoid delays associated with building a new fab from scratch. Following the announcement, Tower’s shares have risen nearly 90% year-to-date.

Commentary: Tower’s USD 3bn expansion plan is one of the largest single investments to date in the field of silicon photonics manufacturing. With the support of a USD 1bn Japanese government subsidy, Tower is seeking to turn its existing production lines in Toyama and Niigata into a global “center of excellence” for silicon photonics and silicon germanium manufacturing. The industrial logic behind this move is clear: as AI clusters evolve from tens of thousands of GPUs to hundreds of thousands of GPUs, bandwidth demand for optical interconnects inside data centers is rising exponentially. Silicon photonics is widely seen as a key path to breaking through the “optical interconnect wall.” Tower’s decision to expand in Japan allows it to leverage TPSCo’s existing infrastructure for rapid capacity ramp-up, while also aligning with the Japanese government’s policy push to revitalize domestic semiconductor manufacturing.

From a competitive landscape perspective, Tower’s entry indicates that silicon photonics manufacturing is accelerating from laboratory validation toward large-scale mass production. TSMC has its COUPE silicon photonics platform, UMC has already begun 12-inch silicon photonics production in Singapore, and Tower’s expansion in Japan suggests that a three-way global foundry structure for silicon photonics capacity is beginning to take shape. For China’s domestic industry, silicon photonics and CPO represent strategic high ground in AI computing infrastructure. The domestic supply chain still needs to accelerate independent breakthroughs in areas such as high-end optical chips and heterogeneous integration packaging, in order to avoid forming a new external dependency in next-generation optical interconnect technologies.

04

Company Trend(July.16)

Intel 18A, 14A Processes and EMIB Packaging Secure Design Engagements from AMD, Nvidia and Other Major Customers, Marking Major Breakthrough for Foundry Business

According to KeyBanc Capital Markets and FactSet, Intel has made substantial progress on its next-generation 18A, including 18A-P, and 14A process nodes, securing design engagements from multiple technology giants including AMD, Nvidia, Marvell, Microsoft, Micron, and OpenAI. Intel has currently only brought the 18A node into mass production, which is now in the capacity ramp-up phase. 18A-P is in risk production, while 14A is scheduled for risk production in 2028 and mass production in 2029. In terms of yield, 18A has improved to approximately 85%, up from around 65% in the previous quarter. This is slightly behind TSMC’s N2, or 2nm, which has a yield of around 90%, but significantly ahead of Samsung’s SF2, which is reportedly at 50%–60%. In advanced packaging, Intel’s EMIB and its variants, EMIB-T and EMIB-M, have reached the “gold standard” yield level of 98%. Customers rumored to be using Intel’s EMIB packaging include Nvidia for its Feynman GPU, Google for its TPU HumuFish, and Amazon for AWS Trainium 3. Intel is also advancing its glass substrate packaging roadmap, with production to take place at its Rio Rancho facility.

Commentary: Intel Foundry’s concentrated disclosure of design engagements from multiple major customers marks a substantive customer validation phase in its transition from an internal manufacturing operation to a second major global advanced foundry option. The improvement in 18A yield from 65% to 85% in just one quarter has narrowed the gap with TSMC’s N2 to only five percentage points. Meanwhile, the 98% yield achieved by EMIB packaging has reached the same “gold standard” level as TSMC’s CoWoS, compared with only 90% three months ago. For AI chip customers long constrained by tight TSMC capacity, Intel is finally offering an alternative that is “good enough and usable.”

From a competitive landscape perspective, Intel is pursuing a dual-engine strategy of “process technology + packaging” in an attempt to break TSMC’s near-monopoly in advanced foundry manufacturing. 18A is designed to attract logic chip customers, while EMIB directly targets the CoWoS capacity bottleneck, which is currently one of the key constraints on AI chip shipments. If Intel can proceed with 14A mass production as scheduled in 2027–2028 and continue expanding its packaging capacity, global advanced semiconductor manufacturing could shift from a TSMC-dominated structure to a two-leader landscape. For China’s domestic industry, the rise of Intel’s foundry capabilities may further divert advanced-node demand away from TSMC and accelerate the regional restructuring of global foundry capacity. At the same time, it could also provide Chinese chip design companies with a second overseas advanced-node option beyond TSMC.

05

Company Trend(July.13)

Dongfang Suanxin Unveils First Flagship Chip DF1000, World’s First Software-Defined Near-Memory Computing 3D Chip

On the afternoon of July 13, Dongfang Suanxin officially released its first flagship chip, the DF1000, in Shanghai. As the world’s first software-defined near-memory computing 3D chip, DF1000 adopts an innovative “software-defined + 3D-stacked near-memory computing” architecture, addressing core bottlenecks such as the memory wall and power wall that constrain the development of high-end computing chips in China. Built on a 14nm process node, the chip delivers 520 TFLOPS of BF16 compute performance, with memory access bandwidth of up to 6.4 TB/s and scale-up bandwidth of up to 900 GB/s. Professor Wei Shaojun, Chairman and CEO of Dongfang Suanxin, said DF1000 achieves high-performance computing output on domestic mature process technology through architectural innovation. The team has also built a fully domestic supply chain system and an independent software ecosystem, enabling the chip to support compute demand in the era of large AI models. Dongfang Suanxin originated from the Mobile Computing Research Center at the School of Integrated Circuits, Tsinghua University. The company was founded in May 2024 and is headquartered in Shanghai. In terms of financing, the company completed its A+ round at the end of April 2026, with a post-money valuation of RMB 12.275bn. The National Artificial Intelligence Industry Fund is among its shareholders. The company plans to launch its Series B financing round in the fourth quarter of this year.

06

Company Trend(July.15)

SMEC Begins Construction of 12-Inch Automotive-Grade Mixed-Signal Chip Manufacturing Project in Shaoxing, with a Total Investment of Approximately RMB 20bn

According to Shaoxing Daily, SMEC’s 12-inch automotive-grade mixed-signal chip manufacturing project recently broke ground in the Shaoxing section of the Hangzhou-Shaoxing Airport Economic Integration Demonstration Zone. As a key Phase IV project of SMEC, the project plans total investment of approximately RMB 20bn and will build a chip production line with monthly capacity of 50,000 wafers. Through capacity expansion and technology upgrades, the company aims to position itself in the emerging AI compute market. The project covers an area of approximately 500 mu and will be jointly invested in and constructed by SMEC and related parties. Its core technologies and products include 40/28nm MCU/DSP chips, analog circuits such as 90/55nm BCD/DrMOS, and 55nm silicon photonics/laser driver chips. After the project reaches full production, it is expected to generate annual output value of more than RMB 5.5bn.

The project marks SMEC’s formal entry into two new growth areas —AI server power management and optical interconnects — while consolidating its two core markets of new energy vehicles and industrial control. Since establishing its base in Shaoxing, SMEC has successfully completed and put into operation three phases of projects. At present, the company’s annual wafer output has reached 2.5127mn wafers on an 8-inch-equivalent basis. After the Phase IV project enters production, total capacity is expected to exceed 400,000 wafers per month. On June 11 this year, SMEC announced plans to jointly build a 12-inch mixed-signal chip production line with monthly capacity of 50,000 wafers in Shaoxing, Zhejiang Province. The project, as the company’s fourth-phase investment project, plans total investment of approximately RMB 20bn. SMEC will contribute RMB 3.012bn and hold a 25.1% stake. The move is seen as a key step in SMEC’s systematic entry into two high-growth segments: AI server power management chips and optical interconnect chips.

07

Company Trend（July.16)

PhiChem Materials’ High-End Epoxy Molding Compound Project Begins Production in Anqing, Targeting Key Materials for Advanced Packaging with Annual Capacity of 10,000 Tonnes

Recently, PhiChem Materials’ intelligent semiconductor materials plant in Anqing, Anhui Province officially commenced production. The newly commissioned facility is operated by Anhui Anqing Xingkai Semiconductor Materials Co., Ltd. With total investment of RMB 100mn, the project focuses on the R&D and production of high-end epoxy molding compound (EMC), with designed annual capacity of 10,000 tonnes. The products target high-end application areas such as memory stacked packaging, AI chips, and automotive power devices. Epoxy molding compound is an indispensable key material in semiconductor packaging. Its performance directly affects chip reliability, heat dissipation, and signal integrity. As advanced packaging technologies move toward 3D stacking, system-in-package, and other advanced architectures, performance requirements for high-end EMC continue to rise. The high-end EMC production line launched by PhiChem Materials is expected to provide key material support for China’s domestic advanced packaging supply chain and reduce reliance on imported materials.